
BIOS_ARDES_FUN equ 0xe820

SMAP equ 0x534d4150
LOADER_BASE_ADDR equ 0x500
LOADER_LBA equ 2
K_CODE_SEL  equ  1<<3
K_DATA_SEL  equ  2<<3
K_VIDEO_SEL equ  3<<3 

KERNAL_LOAD_ADDR equ 0x70000
KERNAL_LBA equ 8
KERNAL_STACK_ADDR equ 0xc009f000
K_PD_BASE equ 0x100000
K_PT_BASE equ 0x101000

VGA_BASE_ADDR equ 0xB800
ATA0_CBR_M_DATA equ 0x1F0
ATA0_CBR_M_ERR  equ 0x1F1
ATA0_CBR_M_FEATURES equ 0x1F1
ATA0_CBR_M_SCTOR_COUNT equ 0x1F2
ATA0_CBR_M_LBA_LOW equ 0x1F3
ATA0_CBR_M_LBA_MID equ 0x1F4
ATA0_CBR_M_LBA_HI  equ 0x1F5
ATA0_CBR_M_DEV	   equ 0x1F6
ATA0_CBR_M_STATUS  equ 0x1F7
ATA0_CBR_M_COMMAND equ 0x1F7
CBR_COMMAND_READ equ 0x20
CBR_COMMAND_WRITE equ 0x30

;Descriptor base limit attr total 8 byte

%macro Descriptor 3
dw %2 & 0xFFFF
dw %1 & 0xFFFF
db (%1 >> 16) & 0xFF
dw ((%2 >> 8)  & 0xF00) | ( %3 & 0xF0FF )
db (%1 >> 24) & 0xFF
%endmacro

G_4K equ 0xF000
G_1  equ 0x7000

K_CODE_X   equ  0x98
K_COCE_XR  equ  0x9c
K_DATA_R   equ  0x90
K_DATA_RW  equ  0x92

;elf header offset

ELF32_ENTRY equ 24
ELF32_PHOFF equ 28
ELF32_EHSIZE equ 40 ;word
ELF32_PHENT_SIZE equ 42;word
ELF32_PHNUM equ 44

;elf progame header offset
PT_NULL equ 0
PT_LOAD equ 1
PT_GNU_STACK  equ  0x6474e551

PHDR_TYPE equ 0
PHDR_OFF  equ 4
PHDR_VADDR equ 8
PHDR_PADDR equ 12
PHDR_FILESZ equ 16

;CRT Control register define here

TEXT_MODE_LINE_ROW equ 80
TEXT_MODE_LINE_COL equ 25
TEXT_BG_BLACK equ 0x07

CRT_ADDR	equ 0x3d4
CRT_DATA	equ 0x3d5

CRT_CUR_LO_HI	equ 0x0e
CRT_CUR_LO_LOW	equ 0x0f


